<\/p>\n\n\n\n
Layout and structure of the PCB<\/h2>\n
A PCB consists of alternating layers of dielectric and conductive materials typically made using FR4\/resin and copper respectively as shown in figure 1. Layers that are used for ground planes often are 100% conductive material. While the layers with attached components, traces and interconnects will have some mixture of conductive and dielectric materials. <\/p>\n
<\/p>\n Figure 1. PCB layout<\/p>\n <\/p>\n The preceding calculation procedure assumes that the component is intimately attached to the PCB using an exposed metal pad or some similar attachment method that creates an extremely low thermal resistance path between the component and the PCB. The component is located at or close to the geometric center of the PCB. The upper and lower surfaces of the PCB are cooled via natural convection or forced convection and radiation. A heat transfer coefficient hext<\/sub> is used to quantify the effectiveness of cooling from these outer surfaces. Reference the articles How to design a flat plate heat sink<\/a> and Performance of a LED flat plate heat sink in multiple orientations<\/a> for the formulas used to calculate hext<\/sub> for natural convection and radiation.<\/p>\n <\/p>\n\n\n\n To facilitate the preceding calculations the rectangular PCB and attached component are converted to circles of equivalent areas with radii ro<\/sub> and ri<\/sub> respectively using equations 1 and 2. The approximation of the rectangular areas as circular areas introduces an error of less than 1% at an aspect ratio (width\/length) of 1, increasing to an error 8% at aspect ratios of 2.5 or 0.4.<\/p>\n The composite nature of the PCB complicates the thermal analysis and does not allow for the PCB to be treated as a simple flat plate heat sink made from uniform thermal conductivity material. The thermal conductivity through the thickness and in the plane of the PCB are different. Additionally, the position of the dielectric and conducting layers from top to bottom affect how well heat is conducted from the heat generating component through the PCB and then to the surroundings.<\/p>\n The thermal resistance calculation is conducted layer by layer to account for the non-uniform thermal conductivity of the PCB. The section of each layer directly under the component is a disk with radius ri<\/sub> and thickness tn<\/sub>. This disk will be referred to as the “inner disk”. The periphery of the disk has an equivalent convection coefficient ho,n<\/sub> that represents the effective cooling of the outer portion of the layer as shown in figure 2. <\/p>\n The subscript n in tn <\/sub>, ho,n <\/sub>and all other variables subsequently defined refers to the layer number where layer number 1 is attached to the component and N is the total number of layers in the PCB.<\/p>\n Figure 2. PCB layers and sections used in the analysis.<\/p>\n The outer portion of each layer is an annulus (referred to as the “outer annulus”) with inner and outer radii ri<\/sub> and ro<\/sub> respectively.<\/p>\n The calculation for ho,n<\/sub> is developed with the approximation that the temperature difference between the layers of the PCB is small. As such the flow of heat is predominantly radial in the outer annulus. The resistance to heat flow in the outer annulus can then be approximated by the thermal resistance network shown in figure 3.<\/p>\n Rcond,o,n<\/sub> in the thermal resistance network shown in figure 3 represents the conduction thermal resistance of each layer and Rext<\/sub> is the thermal resistance due to the convection\/radiative cooling hext<\/sub> on the exposed upper and lower surfaces of the PCB. The total equivalent thermal resistance of the thermal resistance network is determined by combining the parallel and series resistances as illustrated in figure 4. <\/p>\n Figure 4. Simplified thermal resistance network for the outer annulus layers<\/p>\n To determine Rcond,o,n<\/sub> for each layer, Router<\/sub> is first calculated by determining keff<\/sub>, the average in-plane thermal conductivity of the PCB. keff<\/sub> is an average of the effective thermal conductivity of each layer, keff,n<\/sub>.<\/p>\n The effective thermal conductivity keff,n<\/sub> of each layer is: <\/p>\n where: The value of \u03c3c,n<\/sub> ranges from 0 to 1. It can be determined by estimating the conductor coverage area on each layer and dividing that value by the total PCB area (L x W).<\/p>\n Thermal conductivities of 398W\/m\u00b7K for copper and 0.3W\/m\u00b7K for FR4 are most often used for the conductor and dielectric materials respectively.<\/p>\n The average in-plane effective thermal conductivity of the entire PCB, keff <\/sub>is:<\/p>\n The resistance Router<\/sub> is calculated using the solution for a circular fin [1] expressed as:<\/p>\n where: The multiplication of hext<\/sub> by 2 in equation 6 indicates that both the upper and lower surfaces of the PCB are subjected to convective and\/or radiative cooling.<\/p>\n The use of Bessel functions in equation 5 may seem complex, however Bessel functions are readily available in MS Excel or any commercial mathematics software as a built-in function. <\/p>\n With the value of Router<\/sub> known, Rcond,o,n<\/sub> for each layer is calculated using equations 7, 8, 9 and 10.<\/p>\n Aext<\/sub> is the exposed surface area of the outer annulus.<\/p>\n The equivalent convection coefficient on the periphery of the inner disk for each layer ho,n<\/sub> can now be calculated with equation 11.<\/p>\n <\/p>\n\n\n The next step in the calculation is to determine the value of hb,n<\/sub>, the effective heat transfer coefficient acting on the base of the inner disk of each layer as shown in figure 2.\u00a0 This is done by calculating the equivalent heat transfer coefficient that the inner disk of the nth<\/sup> layer applies to the lower surface of the inner disk of the n-1 layer. Equation 12 uses the equation for an extended surface with convection heat transfer around the periphery and lower surface [2] to calculate hb,n-1<\/sub>.<\/p>\n As<\/sub> and Ps<\/sub> are the cross-sectional area and perimeter respectively of the inner disk.<\/p>\n The calculation is started at the last (Nth<\/sub>) layer with hb,N<\/sub>=0 on the bottom surface of the inner disk for that layer. hb,N<\/sub> is not set to equal hext<\/sub> since the dissipation of heat from the base of the inner disk will be evaluated separately.<\/p>\n Using equation 12, hb,N-1<\/sub> is calculated. This process is repeated N times for all the layers resulting in an equivalent heat transfer coefficient hb<\/sub>. This process is illustrated in figure 5.\u00a0<\/p>\n Figure 5. Iterative calculation for hb<\/sub><\/p>\n The heat transfer coefficient hb<\/sub> is the equivalent heat transfer coefficient of the conduction resistance due to flow of heat through the inner disk and into the outer annulus of the PCB acting on the heat generating component. This conduction thermal resistance is:<\/p>\n Note: R*<\/sup>cond,o<\/sub> includes the thru-plane and in-plane conduction across the PCB which is why the “*” notation is used to differentiate this variable from Rcond,o<\/sub> which only accounts for the in-plane conduction in the outer annulus.<\/p>\n The heat flow from the heat generating component through the PCB to the ambient is represented by the thermal resistance diagram in figure 6. Flow through the bottom of the inner disk exposed to hext<\/sub> is accounted for with Rcond,i<\/sub> and Rext,i<\/sub> thermal resistances.\u00a0<\/p>\n Figure 6. Thermal resistance network for heat flow through the PCB to the ambient<\/p>\n Rcond,i<\/sub> is the summation of the thru-plane thermal resistances of each layer, (equation 17) and Rext,i<\/sub> is the thermal resistance due to hext<\/sub> of the area As.<\/sub><\/p>\n The thermal resistances in figure 6 are combined to a single thermal resistance Rpcb<\/sub>:<\/p>\n Thermal vias placed under the heat generating component provide a path to more efficiently transfer heat from the heat generating component to the inner layers and base layer of the PCB. This then allows to the heat to be spread across these layers reducing the thermal resistance of the PCB. <\/p>\n![\"PCB](\"https:\/\/www.heatsinkcalculator.com\/blog\/wp-content\/uploads\/2023\/02\/PCB_layout-1.png\")
<\/a><\/p>\nCalculating the thermal resistance of each PCB layer<\/h2>\n
<\/a><\/p>\n<\/a>Figure 3. Outer annulus layers and resistance network<\/p>\n<\/a><\/p>\n
<\/p>\nCombining the PCB layer thermal resistances<\/h2>\n
<\/a><\/p>\n<\/a><\/p>\nThermal via calculations<\/h2>\n